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Tips
For BGA Escape Routing

Wednesday,
August 01, 2007

BGAs
are used more commonly now than ever before and
are increasing design density and complexity. At
the same time, the BGAs, themselves, are
shrinking in size and adding greater numbers of
pins. This calls for more precise design and
manufacturing techniques.

However, size
of the traces is shrinking. Currently, trace
routing between BGA pads is 2 - 3 mils. This
poses difficulties at fabrication and assembly.
These thin traces demand tight control of
compensation factors to highly precise levels
and at different manufacturing stages.

The escape
routing technique takes into account such
factors as ball pitch, land diameter, number of
I/O pins, via type, pad size, decoupling
capacitor placement, trace width/spacing, and
the number of layers required to escape the
BGA.

Here are some helpful tips for routing
BGAs:

Placement of decoupling capacitors is very
critical. A decoupling capacitor must be placed
as close as possible to the BGA pad. Otherwise,
a higher inductance path than necessary is
created.

Modern device complexity requires the use of
fine pitch BGAs. This calls for diagonal
placement of via capture pads compared to
in-line with surface pads. Flared dog bone
fan-out is the most popular method used
today.

Via pad size also affects the number of
traces that can be routed within each
channel.

In a BGA pad design using silver-filled
vias, the need for dog-bone fan-out is
eliminated, and a small increase in density is
realized by being able to route a few more
signals on the outer surface.

Factor in extra time. Silver-filled vias are
a specialized process and extend PCB
fabrication time by three to five days to
incur extra costs.

On 0.5mm pitch BGAs, micro-via on the BGA
land is the most common approach, as pads are
not typically large enough for through vias. In
this case, the outer perimeters can be fanned
out using blind vias.

A more productive technique could be to
route on a 45º angle from the corners of each
quadrant. This method aids in utilizing all
possible escapes and in turn could reduce the
number of layers required.

As device packages are able to handle
more I/Os with minimum increase in size, signal
escape routing will continue to be more
difficult. The number of PCB layers required to
escape all the pins depend on a number of
factors. Some of these factors, like the ball
pitch, and land size are device specific and
need to be factored in prior to starting board
layout. Others have to be figured out by the
designer. Board designers will always be pushed
towards using the minimum number of routing
layers to reduce cost, especially when using a
strip-line structure. Hence successful and
effective routing will always be a challenge for
the PCB designer.

It is therefore important for a contract
manufacturer (CM) or EMS provider to have a
capable, experienced design team to correctly
design trace routing between BGAs. A high level
of experience is also vital at the manufacturing
level to run proper DFM checks. This assures a
BGA-populated PCB is easily and effectively
manufactured in small quantities, as well as
mass produced
overseas.

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