Notes

Slide
Show

Outline

1

PCB
Layout Guidelines

Updated 1/10/2008, CEPD, Inc.

2

Inputs
to the Layout Process

Files

Mechanical DXF files are provided when available

Netlist from the schematic capture tool

Datasheets

Mechanical requirements detailing

Board outline

mounting holes

connector placement

keep out zones

component height
restrictions

3

More
Inputs to the Layout Process

Electrical Requirements, Indentify:

High current signals

Signals sensitive to crosstalk or coupling

clocks

Isolated signals and barriers

Transmission line signals

Microstrip , Strip line

Controlled impedance signals and pairs

High impedance signals

Desired number of layers

Minimum trace width

Approximate component placement, circuit sectioning

Grounding guidelines

4

Milestones

The layout process has two review milestones.

The initial review occurs after the board outline, component
footprints and component placement is completed.

The second and final review of the board occurs after routing and
design or rules checking, prior to fabrication of the circuit
board.

The final review includes checking of the gerbers files.  Schematics and layout files
will be archived and the revision numbers incremented each
time a board is fabricated with changes.

A checklist follows this slide to aid in the
reviews

5

PCB
Layout Checklist

Check component placement organization, component orientation and
that components are on a grid.

Check Trace Lengths.

Critical lines such as USB and PCI are required to be the same
electrical length

Keep clock signals as sort as possible

Check Trace Widths and copper thickness.

Ensure high current traces are wide enough

Generally, analog or high speed signal traces need to be wider
than digital traces.

Check Trace separation.

Ensure that coupling from adjacent traces will not occur onto
sensitive signals.

Ensure spacing for voltage isolation requirements is met.

Check that guard traces are used where needed.
The guard traces can be power or ground, ground is
preferred.

Verify that copper pours are around analog sections, if
needed.

6

PCB
Layout Checklist Continued

Check that Power Planes and ground planes are logically
organized.  Make sure that they are poured and not
routed.

Check that traces do not cut across power or ground planes
unnecessarily.

Check that the grounding method is consistent, either-

Single point star

Grid

Pour

7

PCB
Layout Checklist Continued

Check the placement of zero ohm resistors which connect ground
planes.

Check controlled impedance trace separation and separation from
ground.

Check that high impedance traces do not have a power or ground pour
above or below them.

Make sure that mounting holes, board dimensions and heat sinking are
correct with respect to the mechanical design.

Verify that components have the correct pin outs and footprints

Special care is necessary with SOT-23 packages (transistors,
diodes, etc.).

How pins are numbered can vary between manufacturers.

Verify that components with tab connections are connected
correctly.

8

PCB
Layout Checklist Continued

Verify that clock traces are short.

Place series resistors close to the signal source.

Place shunt resistors close to the signal termination.

Verify that the outside of the board Keep-outs (and mounting hole
Keep-outs) are maintained.

Verify that mounting holes are grounded to the appropriate ground
type, or are left floating (if the design calls for this).

Verify that Bypass capacitors are placed close to the device power
pins.

9

PCB
Layout Checklist Continued

Verify that the correct revision numbers are displayed on the board
with the silkscreen.  Verify that any other items that are
silkscreened are correct.

Make sure that a DRC/ERC is done on the board for connections vs.
the schematic netlist, clearances, etc.
and remove any errors that may be present.

Verify the packages that were placed for the board match the
footprints in the datasheet and for the P/Ns in the BOM.

Make sure any manual PCB changes are back annotated to the
schematic.

Check Fab notes, material call outs, board and copper thickness, and
plating.

10

Resources

http://circuitcalculator.com/wordpress/2006/01/31/pcb-trace-width-calculator/

http://www.ideaconsulting.com/dstrip.htm

http://www.microwaves101.com/encyclopedia/calmstrip.cfm

http://www.ieee.li/pdf/viewgraphs_pwb_design.pdf

Updated
1/10/2008, CEPD, Inc.

1/10/2008

1

©
2008 CEPD, Inc.   All rights
reserved.  www.cepd.com

Notes

Slide
Show

Outline

1

PCB
Layout Guidelines

Updated 1/10/2008, CEPD, Inc.

2

Inputs
to the Layout Process

Files

Mechanical DXF files are provided when available

Netlist from the schematic capture tool

Datasheets

Mechanical requirements detailing

Board outline

mounting holes

connector placement

keep out zones

component height
restrictions

3

More
Inputs to the Layout Process

Electrical Requirements, Indentify:

High current signals

Signals sensitive to crosstalk or coupling

clocks

Isolated signals and barriers

Transmission line signals

Microstrip , Strip line

Controlled impedance signals and pairs

High impedance signals

Desired number of layers

Minimum trace width

Approximate component placement, circuit sectioning

Grounding guidelines

4

Milestones

The layout process has two review milestones.

The initial review occurs after the board outline, component
footprints and component placement is completed.

The second and final review of the board occurs after routing and
design or rules checking, prior to fabrication of the circuit
board.

The final review includes checking of the gerbers files.  Schematics and layout files
will be archived and the revision numbers incremented each
time a board is fabricated with changes.

A checklist follows this slide to aid in the
reviews

5

PCB
Layout Checklist

Check component placement organization, component orientation and
that components are on a grid.

Check Trace Lengths.

Critical lines such as USB and PCI are required to be the same
electrical length

Keep clock signals as sort as possible

Check Trace Widths and copper thickness.

Ensure high current traces are wide enough

Generally, analog or high speed signal traces need to be wider
than digital traces.

Check Trace separation.

Ensure that coupling from adjacent traces will not occur onto
sensitive signals.

Ensure spacing for voltage isolation requirements is met.

Check that guard traces are used where needed.
The guard traces can be power or ground, ground is
preferred.

Verify that copper pours are around analog sections, if
needed.

6

PCB
Layout Checklist Continued

Check that Power Planes and ground planes are logically
organized.  Make sure that they are poured and not
routed.

Check that traces do not cut across power or ground planes
unnecessarily.

Check that the grounding method is consistent, either-

Single point star

Grid

Pour

7

PCB
Layout Checklist Continued

Check the placement of zero ohm resistors which connect ground
planes.

Check controlled impedance trace separation and separation from
ground.

Check that high impedance traces do not have a power or ground pour
above or below them.

Make sure that mounting holes, board dimensions and heat sinking are
correct with respect to the mechanical design.

Verify that components have the correct pin outs and footprints

Special care is necessary with SOT-23 packages (transistors,
diodes, etc.).

How pins are numbered can vary between manufacturers.

Verify that components with tab connections are connected
correctly.

8

PCB
Layout Checklist Continued

Verify that clock traces are short.

Place series resistors close to the signal source.

Place shunt resistors close to the signal termination.

Verify that the outside of the board Keep-outs (and mounting hole
Keep-outs) are maintained.

Verify that mounting holes are grounded to the appropriate ground
type, or are left floating (if the design calls for this).

Verify that Bypass capacitors are placed close to the device power
pins.

9

PCB
Layout Checklist Continued

Verify that the correct revision numbers are displayed on the board
with the silkscreen.  Verify that any other items that are
silkscreened are correct.

Make sure that a DRC/ERC is done on the board for connections vs.
the schematic netlist, clearances, etc.
and remove any errors that may be present.

Verify the packages that were placed for the board match the
footprints in the datasheet and for the P/Ns in the BOM.

Make sure any manual PCB changes are back annotated to the
schematic.

Check Fab notes, material call outs, board and copper thickness, and
plating.

10

Resources

http://circuitcalculator.com/wordpress/2006/01/31/pcb-trace-width-calculator/

http://www.ideaconsulting.com/dstrip.htm

http://www.microwaves101.com/encyclopedia/calmstrip.cfm

http://www.ieee.li/pdf/viewgraphs_pwb_design.pdf

Notes

Slide
Show

Outline

1

PCB
Layout Guidelines

Updated 1/10/2008, CEPD, Inc.

2

Inputs
to the Layout Process

Files

Mechanical DXF files are provided when available

Netlist from the schematic capture tool

Datasheets

Mechanical requirements detailing

Board outline

mounting holes

connector placement

keep out zones

component height
restrictions

3

More
Inputs to the Layout Process

Electrical Requirements, Indentify:

High current signals

Signals sensitive to crosstalk or coupling

clocks

Isolated signals and barriers

Transmission line signals

Microstrip , Strip line

Controlled impedance signals and pairs

High impedance signals

Desired number of layers

Minimum trace width

Approximate component placement, circuit sectioning

Grounding guidelines

4

Milestones

The layout process has two review milestones.

The initial review occurs after the board outline, component
footprints and component placement is completed.

The second and final review of the board occurs after routing and
design or rules checking, prior to fabrication of the circuit
board.

The final review includes checking of the gerbers files.  Schematics and layout files
will be archived and the revision numbers incremented each
time a board is fabricated with changes.

A checklist follows this slide to aid in the
reviews

5

PCB
Layout Checklist

Check component placement organization, component orientation and
that components are on a grid.

Check Trace Lengths.

Critical lines such as USB and PCI are required to be the same
electrical length

Keep clock signals as sort as possible

Check Trace Widths and copper thickness.

Ensure high current traces are wide enough

Generally, analog or high speed signal traces need to be wider
than digital traces.

Check Trace separation.

Ensure that coupling from adjacent traces will not occur onto
sensitive signals.

Ensure spacing for voltage isolation requirements is met.

Check that guard traces are used where needed.
The guard traces can be power or ground, ground is
preferred.

Verify that copper pours are around analog sections, if
needed.

6

PCB
Layout Checklist Continued

Check that Power Planes and ground planes are logically
organized.  Make sure that they are poured and not
routed.

Check that traces do not cut across power or ground planes
unnecessarily.

Check that the grounding method is consistent, either-

Single point star

Grid

Pour

7

PCB
Layout Checklist Continued

Check the placement of zero ohm resistors which connect ground
planes.

Check controlled impedance trace separation and separation from
ground.

Check that high impedance traces do not have a power or ground pour
above or below them.

Make sure that mounting holes, board dimensions and heat sinking are
correct with respect to the mechanical design.

Verify that components have the correct pin outs and footprints

Special care is necessary with SOT-23 packages (transistors,
diodes, etc.).

How pins are numbered can vary between manufacturers.

Verify that components with tab connections are connected
correctly.

8

PCB
Layout Checklist Continued

Verify that clock traces are short.

Place series resistors close to the signal source.

Place shunt resistors close to the signal termination.

Verify that the outside of the board Keep-outs (and mounting hole
Keep-outs) are maintained.

Verify that mounting holes are grounded to the appropriate ground
type, or are left floating (if the design calls for this).

Verify that Bypass capacitors are placed close to the device power
pins.

9

PCB
Layout Checklist Continued

Verify that the correct revision numbers are displayed on the board
with the silkscreen.  Verify that any other items that are
silkscreened are correct.

Make sure that a DRC/ERC is done on the board for connections vs.
the schematic netlist, clearances, etc.
and remove any errors that may be present.

Verify the packages that were placed for the board match the
footprints in the datasheet and for the P/Ns in the BOM.

Make sure any manual PCB changes are back annotated to the
schematic.

Check Fab notes, material call outs, board and copper thickness, and
plating.

10

Resources

http://circuitcalculator.com/wordpress/2006/01/31/pcb-trace-width-calculator/

http://www.ideaconsulting.com/dstrip.htm

http://www.microwaves101.com/encyclopedia/calmstrip.cfm

http://www.ieee.li/pdf/viewgraphs_pwb_design.pdf