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Michael Peffers

Feb 13, 2015

SPI
bus

SN65LVDT41

Get
Connected

SN65LVDT14

LVDS/M-LVDS/ECL/CML

LVDS
PHY (<800Mbps)

Interface

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Related

Get Connected: How to extend an SPI bus through a differential
interface

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Welcome back to the Get Connected blog series here
on Analog Wire. In my previous Get Connected post, we examined using a general-purpose serializer/deserializer (SERDES) to
aggregate multiple data inputs from different sources for high-speed
transmission in short-reach or long-haul applications. In this post, I’ll look
at extending a serial peripheral interface (SPI) bus through a differential
interface, which can be useful when designing systems that support remote
temperature or pressure sensors, for instance.

In SPI applications, the master and slave are relatively close to each other,
and the signals typically never travel off the printed circuit board (PCB). SPI
signals are single-ended, transistor-to-transistor logic (TTL)-like signals that
can run up to 100Mbps depending on the application. An SPI bus consists of four
signals: system clock (SCLK), master out slave in (MOSI), master in slave out
(MISO) and chip select (CS). The master provides the SCLK, MOSI and CS signals,
while the slave provides the MISO signal. Figure 1 shows the bus architecture of
a standard SPI bus.

Figure 1: SPI bus

What if you need to send your SPI signals off-board from your microcontroller
or digital signal processor (DSP) to a remote board that contains an
analog-to-digital converter (ADC), a digital-to-analog converter (DAC) or
another device? This can be challenging for several reasons. Signal integrity
becomes a big concern due to reflections caused by unterminated signal lines.
The characteristic impedance of the transmission media and termination impedance
will differ substantially, causing an impedance mismatch on the bus. The result
will be a standing wave of energy that radiates from end to end on the bus,
causing communication errors. Electromagnetic interference (EMI) is also a
concern as the high-frequency portion of the SPI signal radiates outward,
allowing the signal to couple onto adjacent signals.

There is a simple solution to this problem, however: differential signaling.
Differential transceivers like the SN65LVDT41 and the SN65LVDT14 take the SPI signals and convert them to
low-voltage differential signaling (LVDS). LVDS works well in SPI applications
due to its noise immunity and bandwidth. A previous Get Connected blog post
reviewed the fundamentals and benefits of LVDS; you can find it here.

The architectures of the SN65LVDT41 and
the SN65LVDT14 allow for the entire SPI bus to be translated to
LVDS: four transceivers in one direction for MOSI, SCLK and CS and one
transceiver in the opposite direction for MISO. The LVDS chipset also has the
added benefit of built-in termination, making implementation simple and reducing
component count in applications where board space is at a premium. Figure 2
shows the makeup of an extended SPI bus architecture using the aforementioned
chipset. Shielded twisted pair (STP) CAT5 cable is not a requirement for such an
implementation, but it is rather a nice to have given its ease of
implementation.

Figure 2: Extended SPI bus

Figures 3, 4 and 5 show the performance of the SN65LVDT41 and SN65LVDT14
transmitters at 100Mbps across multiple lengths of CAT5 cable. The receivers in
the SN65LVDT41 and SN65LVDT14
support a 200mV input threshold tolerance, which is easily met by the
transmitters at these distances and speeds.

Figure 3: 8-meter CAT5 100Mbps TX waveform

Figure 4: 15-meter CAT5 100Mbps TX waveform

Figure 5: 25-meter CAT5 100Mbps TX waveform

For answers to common questions on solving interface design challenges in
your application-specific solutions, check out the TI E2E™ Industrial Interface
Community to read Search posts from engineers already using TI interface
products, or create a new thread to address your specific application. If you’re
not connected, you can get connected with TI’s broad interface portfolio that spans and links together a wide
range of interface standards and applications.

Please watch for my next post in the Get Connected series, where I’ll discuss
a multipoint LVDS (MLVDS) device with extended ESD performance that meets the
International Electrotechnical Commission (IEC) 61000-4-2 specification. In the
meantime, read about extending SPI and McBSP with differential interface products
in this app note.

Leave your comments in the section below if you’d like to hear more about
anything discussed in this post, or if there is an interface topic you'd like to
see us tackle in the future. And be sure to check out the full Get Connected series.

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