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<ServiceMan>
<ManageInfo>
<Ident>
<Category>
</Category>
<Model>SA-AK200</Model>
<System>ORDER NO. MD0112227C1</System>
<SubSystem>CD Stereo System</SubSystem>
<DataType></DataType>
</Ident>
<Status>
<ModuleTitle>s1402000000</ModuleTitle>
<IssueNo issue=3>
<IssueDate day=2 month=Oct year=2002>
<qa>
<Unverif>
</qa>
<ModelName>
<Name>SA-AK200</Name>
<SubModelName></SubModelName>
</ModelName>
<PubType pubtype=ServMan>
<Manufacturer></Manufacturer>
<Originator></Originator>
<Author></Author>
<Authorization>
<Language lang=Eng>
</Status>
</ManageInfo>
<content>
<ServMan>
<References><NoRefs></References>

<Body>
<Descriptive>
<Title>14.2 IC702 (MN662790RSC) Servo Processor&sol; Digital Signal Processor&sol; Digital Filter&sol; D&sol;A Converter</Title>
<Para>
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<nameloc id="ex-top">
<nmlist nametype="entity">
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<Table frame="all" colsep="1" rowsep="1"><tgroup cols="4" colsep="1" rowsep="1"><colspec colnum="1" colname="1" colwidth="0.648in">
<colspec colnum="2" colname="2" colwidth="0.681in">
<colspec colnum="3" colname="3" colwidth="0.553in">
<colspec colnum="4" colname="4" colwidth="1.520in">
<thead><row rowsep="1"><entry colname="1" align="center"><Para><emphasis>Pin No.</emphasis>
</Para>
</entry>
<entry colname="2" align="center"><Para><emphasis>Mark</emphasis>
</Para>
</entry>
<entry colname="3" align="center"><Para><emphasis>I&sol;O</emphasis>
</Para>
</entry>
<entry colname="4" align="center"><Para><emphasis>Function</emphasis>
</Para>
</entry>
</row>
</thead>
<tbody><row rowsep="1"><entry colname="1" align="justify"><Para>1</Para>
</entry>
<entry colname="2" align="justify"><Para>BCLK</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>N.C.</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>2</Para>
</entry>
<entry colname="2" align="justify"><Para>LRCK</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>N.C.</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>3</Para>
</entry>
<entry colname="2" align="justify"><Para>SRDATA</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>N.C.</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>4</Para>
</entry>
<entry colname="2" align="justify"><Para>DVDD1</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Power supply input (for digital circuit) </Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>5</Para>
</entry>
<entry colname="2" align="justify"><Para>DVSS1</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>GND (for digital circuit)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>6</Para>
</entry>
<entry colname="2" align="justify"><Para>TX</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Digital audio interface signal output (Latches data at first transition) </Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>7</Para>
</entry>
<entry colname="2" align="justify"><Para>MCLK</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Microprocessor command clock signal input</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>8</Para>
</entry>
<entry colname="2" align="justify"><Para>MDATA</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Microprocessor command data signal input</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>9</Para>
</entry>
<entry colname="2" align="justify"><Para>MLD</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Microprocessor command load signal input</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>10</Para>
</entry>
<entry colname="2" align="justify"><Para>SENSE</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Sense signal output (OFT, FESL,MAGEND,NAJEND,POSAD,SFG) (Not used, open)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>11</Para>
</entry>
<entry colname="2" align="justify"><Para>&sol;FLOCK</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Focus servo feeding signal output (&ldquo;L&rdquo; : Feed) </Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>12</Para>
</entry>
<entry colname="2" align="justify"><Para>&sol;TLOCK</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Tracking servo feeding signal output (&ldquo;L&rdquo; : Feed)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>13</Para>
</entry>
<entry colname="2" align="justify"><Para>BLKCK</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Sub-code block clock signal output (BLKCKf &equals; 75Hz during normal playback)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>14</Para>
</entry>
<entry colname="2" align="justify"><Para>SQCK</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>External clock signal input for sub-code Q resistor</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>15</Para>
</entry>
<entry colname="2" align="justify"><Para>SUBQ</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Sub-code Q code output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>16</Para>
</entry>
<entry colname="2" align="justify"><Para>DMUTE</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Muting input (&ldquo;H&rdquo; : mute)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>17</Para>
</entry>
<entry colname="2" align="justify"><Para>STAT</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify">Status signal output<Para>(CRC,CUE,CLVS,TTSTVP,FCLV,SQCK)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>18</Para>
</entry>
<entry colname="2" align="justify"><Para>&sol;RST</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Reset signal input</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>19</Para>
</entry>
<entry colname="2" align="justify"><Para>SMCK</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>1&sol;2-diveded clock signal of crystal osscillating at MSEL &equals; &ldquo;H&rdquo; (fSMCK &equals; 8.4672 MHz) 1&sol;4-divided clock signal of crystal oscillating at MSEL &equals; &ldquo;L&rdquo; (fSMCK &equals; 4.2336MHz)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>20</Para>
</entry>
<entry colname="2" align="justify"><Para>CSEL</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Frequency Selection Terminal H &equals; 33.8688 MHz ; L &equals; 16.9344 MHz</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>21</Para>
</entry>
<entry colname="2" align="justify"><Para>TRV</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>N.C</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>22</Para>
</entry>
<entry colname="2" align="justify"><Para>TVD</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Traverse drive output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>23</Para>
</entry>
<entry colname="2" align="justify"><Para>PC</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Spindle motor ON output ("L" : ON)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>24</Para>
</entry>
<entry colname="2" align="justify"><Para>ECM</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Spindle motor drive signal output(forced mode output)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>25</Para>
</entry>
<entry colname="2" align="justify"><Para>ECS</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify">Spindle motor drive signal output<Para>(servo error signal output)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>26</Para>
</entry>
<entry colname="2" align="justify"><Para>KICK</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>N.C.</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>27</Para>
</entry>
<entry colname="2" align="justify"><Para>TRD</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Tracking drive output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>28</Para>
</entry>
<entry colname="2" align="justify"><Para>FOD</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Focus drive output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>29</Para>
</entry>
<entry colname="2" align="justify"><Para>VREF</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>D&sol;A (drive) output (TVD, ECS, TRD, FOD, FBAL, TBAL) Reference voltage input</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>30</Para>
</entry>
<entry colname="2" align="justify"><Para>FBAL</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Focus balance adjustment output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>31</Para>
</entry>
<entry colname="2" align="justify"><Para>TBAL</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Tracking balance adjustment output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>32</Para>
</entry>
<entry colname="2" align="justify"><Para>FE</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Focus error signal input (analog input)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>33</Para>
</entry>
<entry colname="2" align="justify"><Para>TE</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Tracking error signal input (analog input)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>34</Para>
</entry>
<entry colname="2" align="justify"><Para>RFENV</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>RF envelope signal input</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>35</Para>
</entry>
<entry colname="2" align="justify"><Para>VDET</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Vibration detection signal input ("H" :detection)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>36</Para>
</entry>
<entry colname="2" align="justify"><Para>OFT</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Off-track signal input ("H" : off track)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>37</Para>
</entry>
<entry colname="2" align="justify"><Para>TRCRS</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Track cross signal input</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>38</Para>
</entry>
<entry colname="2" align="justify"><Para>&sol;RFDET</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>RF detection signal input ("L" : detection)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>39</Para>
</entry>
<entry colname="2" align="justify"><Para>BDO</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Dropout signal input ("H" : Dropout)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>40</Para>
</entry>
<entry colname="2" align="justify"><Para>LDON</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Laser on signal output ("H" : ON)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>41</Para>
</entry>
<entry colname="2" align="justify"><Para>PLLF2</Para>
</entry>
<entry colname="3" align="justify"><Para>I&sol;O</Para>
</entry>
<entry colname="4" align="justify"><Para>N.C.</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>42</Para>
</entry>
<entry colname="2" align="justify"><Para>DSLF2</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Tracking Offset alignment output&sol;DSL Balance Output (DA Output)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>43</Para>
</entry>
<entry colname="2" align="justify"><Para>WVEL</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>N.C.</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>44</Para>
</entry>
<entry colname="2" align="justify"><Para>ARF</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>RF signal input</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>45</Para>
</entry>
<entry colname="2" align="justify"><Para>IREF</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Reference current input</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>46</Para>
</entry>
<entry colname="2" align="justify"><Para>DRF</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>DSL bias terminal (Not used, open)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>47</Para>
</entry>
<entry colname="2" align="justify"><Para>DSLF</Para>
</entry>
<entry colname="3" align="justify"><Para>I&sol;O</Para>
</entry>
<entry colname="4" align="justify"><Para>DSL loop filter terminal</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>48</Para>
</entry>
<entry colname="2" align="justify"><Para>PLLF</Para>
</entry>
<entry colname="3" align="justify"><Para>I&sol;O</Para>
</entry>
<entry colname="4" align="justify"><Para>PLL loop filter terminal</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>49</Para>
</entry>
<entry colname="2" align="justify"><Para>VCOF</Para>
</entry>
<entry colname="3" align="justify"><Para>I&sol;O</Para>
</entry>
<entry colname="4" align="justify"><Para>VCO loop filter terminal</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>50</Para>
</entry>
<entry colname="2" align="justify"><Para>AVDD2</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Power supply input (for analog circuit)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>51</Para>
</entry>
<entry colname="2" align="justify"><Para>AVSS2</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>GND (for analog circuit)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>52</Para>
</entry>
<entry colname="2" align="justify"><Para>EFM</Para>
</entry>
<entry colname="3" align="justify"><Para>-</Para>
</entry>
<entry colname="4" align="justify"><Para>EFM signal output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>53</Para>
</entry>
<entry colname="2" align="justify"><Para>PCK</Para>
</entry>
<entry colname="3" align="justify"><Para>-</Para>
</entry>
<entry colname="4" align="justify"><Para>PLL extraction clock output (fPCK &equals; 4.321 MHz during normal playback)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>54</Para>
</entry>
<entry colname="2" align="justify"><Para>VCOF2</Para>
</entry>
<entry colname="3" align="justify"><Para>I&sol;O</Para>
</entry>
<entry colname="4" align="justify"><Para>VCO Loop filter for 33.8688 MHz conversation terminal for 16.9344 MHz crystal mode, must use other circuit</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>55</Para>
</entry>
<entry colname="2" align="justify"><Para>SUBC</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Sub-code serial data output </Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>56</Para>
</entry>
<entry colname="2" align="justify"><Para>SBCK</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Clock input for sub-code serial data</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>57</Para>
</entry>
<entry colname="2" align="justify"><Para>VSS</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>GND</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>58</Para>
</entry>
<entry colname="2" align="justify"><Para>X1 IN</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Crystal oscillating circuit input (f &equals; 16.9344MHz)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>59</Para>
</entry>
<entry colname="2" align="justify"><Para>X2 OUT</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Crystal oscillating circuit input (f &equals; 16.9344 MHz)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>60</Para>
</entry>
<entry colname="2" align="justify"><Para>VDD</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Power supply input (for oscillating circuit)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>61</Para>
</entry>
<entry colname="2" align="justify"><Para>BYTCK</Para>
</entry>
<entry colname="3" align="justify"><Para>-</Para>
</entry>
<entry colname="4" align="justify"><Para>Byte clock output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>62</Para>
</entry>
<entry colname="2" align="justify"><Para>&sol;CLDCK</Para>
</entry>
<entry colname="3" align="justify"><Para>-</Para>
</entry>
<entry colname="4" align="justify"><Para>Sub-code frame clock signal output (fCLDCK &equals; 7.35 kHz during normal playback)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>63</Para>
</entry>
<entry colname="2" align="justify"><Para>FCLK</Para>
</entry>
<entry colname="3" align="justify"><Para>-</Para>
</entry>
<entry colname="4" align="justify"><Para>Crystal frame clock signal output (fCLK &equals; 7.35 kHz, double &equals; 14.7 kHz)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>64</Para>
</entry>
<entry colname="2" align="justify"><Para>IPFLAG</Para>
</entry>
<entry colname="3" align="justify"><Para>-</Para>
</entry>
<entry colname="4" align="justify"><Para>Interpolation flag output (&ldquo;H&rdquo; : Interpolation)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>65</Para>
</entry>
<entry colname="2" align="justify"><Para>FLAG</Para>
</entry>
<entry colname="3" align="justify"><Para>-</Para>
</entry>
<entry colname="4" align="justify"><Para>Flag output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>66</Para>
</entry>
<entry colname="2" align="justify"><Para>CLVS</Para>
</entry>
<entry colname="3" align="justify"><Para>-</Para>
</entry>
<entry colname="4" align="justify"><Para>Spindle servo phase synchronizing signal output ("H" : CLV, "L" : rough servo)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>67</Para>
</entry>
<entry colname="2" align="justify"><Para>CRC</Para>
</entry>
<entry colname="3" align="justify"><Para>-</Para>
</entry>
<entry colname="4" align="justify"><Para>Sub-code CRC checked output (&ldquo;H&rsquo; :OK, &ldquo;L&rdquo; :NG)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>68</Para>
</entry>
<entry colname="2" align="justify"><Para>DEMPH</Para>
</entry>
<entry colname="3" align="justify"><Para>-</Para>
</entry>
<entry colname="4" align="justify"><Para>De-emphassis ON signal output (&ldquo;H&rdquo; :ON)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>69</Para>
</entry>
<entry colname="2" align="justify"><Para>RESY</Para>
</entry>
<entry colname="3" align="justify"><Para>-</Para>
</entry>
<entry colname="4" align="justify"><Para>Frame re-synchronizing signal output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>70</Para>
</entry>
<entry colname="2" align="justify"><Para>IOSEL</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Mode Switching Terminal</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>71</Para>
</entry>
<entry colname="2" align="justify"><Para>&sol;TEST</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Test input</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>72</Para>
</entry>
<entry colname="2" align="justify"><Para>AVDD1</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Power supply input (for analog circuit)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>73</Para>
</entry>
<entry colname="2" align="justify"><Para>OUTL</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Left channel audio signal output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>74</Para>
</entry>
<entry colname="2" align="justify"><Para>AVSS1</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>GND</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>75</Para>
</entry>
<entry colname="2" align="justify"><Para>OUTR</Para>
</entry>
<entry colname="3" align="justify"><Para>O</Para>
</entry>
<entry colname="4" align="justify"><Para>Right channel audio signal output</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>76</Para>
</entry>
<entry colname="2" align="justify"><Para>RSEL</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>RF signal polarity assignment input (at "H" level, RSEL&equals;"H", at "L" level, RESL&equals;"L")</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>77</Para>
</entry>
<entry colname="2" align="justify"><Para>IOVOD</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>5V supply input</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>78</Para>
</entry>
<entry colname="2" align="justify"><Para>PSEL</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>Test terminal (connected to Gnd)</Para>
</entry>
</row>
<row rowsep="1"><entry colname="1" align="justify"><Para>79</Para>
</entry>
<entry colname="2" align="justify"><Para>MSEL</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>SMCK oscillating frequency designation input (&ldquo;L&rdquo;:4.2336 MHz, &ldquo;H&rdquo;:8.4672 MHz)</Para>
</entry>
</row>
<row rowsep="0"><entry colname="1" align="justify"><Para>80</Para>
</entry>
<entry colname="2" align="justify"><Para>SSEL</Para>
</entry>
<entry colname="3" align="justify"><Para>I</Para>
</entry>
<entry colname="4" align="justify"><Para>SUBQ output mode select (&ldquo;H&rdquo;:Q-code buffer mode)</Para>
</entry>
</row>
</tbody>
</tgroup>
</Table>

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